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d a t a sh eet product speci?cation supersedes data of 1996 jul 12 file under integrated circuits, ic17 1997 jan 17 integrated circuits cgy2030m dect 500 mw power amplifier
1997 jan 17 2 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m features power amplifier (pa) overall efficiency 40% 27 db gain 0 dbm input power operation possible without negative supply wide operating temperature range - 30 to +85 c ssop16 package. applications 1.88 to 1.9 ghz transceivers for dect applications 2 ghz transceivers (phs, dcs). general description the cgy2030m is a gaas monolithic microwave integrated circuit (mmic) power amplifier specifically designed to operate at 3.6 v battery supply. when power control is not required, it can be operated without negative supply voltage. quick reference data note 1. for conditions, see chapters ac characteristics and dc characteristics. ordering information block diagram symbol parameter (1) min. typ. max. unit v dd positive supply voltage - 3.2 - v i dd positive peak supply current - 400 - ma p o output power - 27 - dbm t amb operating ambient temperature - 30 - +85 c type number package name description version cgy2030m ssop16 plastic shrink small outline package; 16 leads; body width 4.4 mm sot369-1 fig.1 block diagram. handbook, full pagewidth cgy2030m mbg631 rfo/v dd4 2, 3, 4, 6, 7, 11, 12, 14, 15 10 1 5 8 916 13 v gg2 v gg1 rfi v dd1 v dd2 v dd3
1997 jan 17 3 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m pinning symbol pin description v gg2 1 fourth stage negative gate supply voltage gnd 2 to 4 ground v dd2 5 second stage supply voltage gnd 6 and 7 ground v dd1 8 ?rst stage supply voltage rfi 9 pa input v gg1 10 ?rst second and third stages negative gate supply voltage gnd 11 and 12 ground v dd3 13 third stage supply voltage gnd 14 and 15 ground rfo/v dd4 16 pa output and fourth stage supply voltage fig.2 pin configuration. handbook, halfpage cgy2030m mbg630 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 v gg2 gnd gnd gnd gnd gnd gnd rfo/v dd4 v dd3 v gg1 rfi gnd gnd gnd v dd1 v dd2 functional description ampli?er the cgy2030m is a 4-stage gaas mesfet power amplifier capable of delivering 500 mw (typ.) at 1.9 ghz into a 50 w load. each amplifier stage has an open-drain configuration. the drains have to be loaded externally by adequate reactive circuits which must also provide a dc path to the supply. the amplifier can be switched off by means of an external pnp series switch connected between the battery and the amplifier drains. this switch can also be used to vary the actual supply voltage applied to the amplifier and hence, control the output power. this device is specifically designed to work with a maximum duty factor of 25%. biasing two modes of operation are possible: mode 1 mode 2. m ode 1 in the first mode, the pins v gg1 and v gg2 are simply connected together to the ground via resistors (10 k w in the evaluation board; see fig.4). the amplifier biases itself internally to a negative voltage by action of the incoming rf signal. in this mode, power control cannot be achieved by varying the amplifier supply voltage; therefore it is suitable only for applications where power control is not required such as dect. m ode 2 if a negative bias is available, a second mode of operation is possible, in which the amplifier is biased by providing adequate negative voltages at pins v gg1 and v gg2 . in this mode, the amplifier internal bias does not depend on the incoming rf level, nor on the drain voltage, so that power control is possible by variation of the supply voltage.
1997 jan 17 4 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m limiting values in accordance with the absolute maximum rating system (iec 134). thermal characteristics handling do not operate or store near strong electrostatic fields. meets class 1 esd test requirements [human body model (hbm)], in accordance with mil std 883c - method 3015 . dc characteristics v dd = 3.2 v; t amb =25 c; unless otherwise speci?ed. notes 1. negative voltages v gg1 and v gg2 must be applied before supply voltage v dd . 2. due to non linear effects at high power levels, the gate current can be either negative or positive. symbol parameter conditions min. typ. max. unit v dd operating supply voltage -- 5.2 v v dd - v gg voltage difference between supply voltage and gate bias voltage no input signal -- 8v t j(max) maximum operating junction temperature -- 150 c p tot total power dissipation -- 400 mw t stg ic storage temperature - 55 - +125 c symbol parameter value unit r th j-a thermal resistance from junction to ambient in free air 145 k/w symbol parameter conditions min. typ. max. unit pins rfo/v dd4, v dd3 , v dd2 and v dd1 v dd positive supply voltage 2.6 3.2 4.2 v i dd positive peak supply current - 400 500 ma pins v gg1 and v gg2 ; in mode 2 v gg1 bias voltage for input stages note 1 -- 1.2 - v v gg2 bias voltage for output stage note 1 -- 2.0 - v i gg(tot) total gate peak current note 2 - 1 - +1 ma
1997 jan 17 5 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m ac characteristics v dd = 3.2 v; f rf = 1900 mhz; p i = 0 dbm; t amb =25 c; duty factor d = 25%; 50 w impedance system; measured and guaranteed on cgy2030m evaluation board (see fig.4). notes 1. self biasing guaranteed in mode 1 at minimum input power ( - 3 dbm) and minimum supply voltage v dd (2.6 v). 2. the device is adjusted to provide nominal value of load power into a 50 w load. the device is switched off and a 6 : 1 load replaces the 50 w load. the device is switched on and the phase of the 6 : 1 load is varied 360 electrical degrees during a 60 seconds test period. symbol parameter conditions min. typ. max. unit p i input power note 1 - 3 - +5 dbm d duty factor -- 25 % f rf operating frequency - 1900 - mhz measured in mode 1; without negative biasing; v gg1 and v gg2 connected to ground p o output power 26 27 28.5 dbm h ef?ciency - 40 - % p leak rf leakage to output in power off state v dd =0v -- 40 - dbm h2, h3 second and third harmonics level -- 35 - dbc stab stability (spurious levels) note 2 -- 60 - dbc measured in mode 2; with negative biasing at pins v gg1 and v gg2 p o output power 25.5 26.5 28 dbm h ef?ciency - 35 - % p leak rf leakage to output in power off state v dd =0v -- 50 - dbm fig.3 typical power and current characteristics in mode 1. handbook, halfpage 32 28 24 20 650 550 450 350 23 5 4 v dd (v) p o (dbm) p o i dd (ma) i dd mgg165
1997 jan 17 6 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m application information the cgy2030m is operated and tested in accordance with the circuit diagram shown in fig.4. supply voltage switching is achieved by two bipolar pnp transistors. one transistor switches the first and second stages and the other switches the third and fourth stages. by switching on the last amplifier stages with some delay compared to the first stages, it is possible to get the last stages already self-biased before their supply voltage has reached its steady state value. this enables smooth power up-ramping without any power overshoot. a simpler drain switching circuit can be used if the amplifier is operated with negative biasing of the pins v gg1 and v gg2 . fig.4 evaluation board schematic. thickness: 0.8 mm; substrate: fr4; e r = 4.7. (1) trl1: width = 500 m m; length = 11200 m m. (2) trl2: width = 500 m m; length = 7770 m m. (3) trl3: width = 300 m m; length = 15450 m m. (4) trl4: width = 1600 m m; length = 12000 m m. (5) trl5: width = 1600 m m; length = 11000 m m. handbook, full pagewidth mgg166 10 k w 10 k w 100 w z c = 50 w z c = 50 w 1 w 3.3 w 330 w 8765 cgy2030m 4321 9 10111213141516 v gg2 v gg2 gnd gnd gnd gnd gnd gnd rfo/ v dd4 v dd3 v gg1 v gg1 rfi gnd gnd gnd v dd1 v dd2 1.5 pf pa output ramp v bat dtc11ye bc858 bc807 pa input 1.8 pf trl5 (5) trl3 (3) trl2 (2) trl1 (1) trl4 (4) 10 pf 10 pf 22 pf 6.8 pf 100 m f 68 pf 10 nf 6.8 pf 100 nf
1997 jan 17 7 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m package outline unit a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec eiaj mm 0.15 0.00 1.4 1.2 0.32 0.20 0.25 0.13 5.30 5.10 4.5 4.3 0.65 6.6 6.2 0.65 0.45 0.48 0.18 10 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.20 mm maximum per side are not included. 0.75 0.45 1.0 sot369-1 94-04-20 95-02-04 w m q a a 1 a 2 b p d y h e l p q detail x e z e c l v m a x (a ) 3 a 0.25 18 16 9 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 4.4 mm sot369-1 a max. 1.5
1997 jan 17 8 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m soldering introduction there is no soldering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. however, wave soldering is not always suitable for surface mounted ics, or for printed-circuits with high population densities. in these situations reflow soldering is often used. this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our ic package databook (order code 9398 652 90011). re?ow soldering reflow soldering techniques are suitable for all ssop packages. reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several techniques exist for reflowing; for example, thermal conduction by heated belt. dwell times vary between 50 and 300 seconds depending on heating method. typical reflow temperatures range from 215 to 250 c. preheating is necessary to dry the paste and evaporate the binding agent. preheating duration: 45 minutes at 45 c. wave soldering wave soldering is not recommended for ssop packages. this is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. if wave soldering cannot be avoided, the following conditions must be observed: a double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. the longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. even with these conditions, only consider wave soldering ssop packages that have a body width of 4.4 mm, that is ssop16 (sot369-1) or ssop20 (sot266-1) . during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. maximum permissible solder temperature is 260 c, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 c within 6 seconds. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. repairing soldered joints fix the component by first soldering two diagonally- opposite end leads. use only a low voltage soldering iron (less than 24 v) applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
1997 jan 17 9 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m definitions life support applications these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. data sheet status objective speci?cation this data sheet contains target or goal speci?cations for product development. preliminary speci?cation this data sheet contains preliminary data; supplementary data may be published later. product speci?cation this data sheet contains ?nal product speci?cations. limiting values limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the speci?cation.
1997 jan 17 10 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m notes
1997 jan 17 11 philips semiconductors product speci?cation dect 500 mw power ampli?er cgy2030m notes
internet: http://www.semiconductors.philips.com philips semiconductors C a worldwide company ? philips electronics n.v. 1997 sca53 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. netherlands: postbus 90050, 5600 pb eindhoven, bldg. vb, tel. +31 40 27 82785, fax. +31 40 27 88399 new zealand: 2 wagener place, c.p.o. box 1041, auckland, tel. +64 9 849 4160, fax. +64 9 849 7811 norway: box 1, manglerud 0612, oslo, tel. +47 22 74 8000, fax. +47 22 74 8341 philippines: philips semiconductors philippines inc., 106 valero st. salcedo village, p.o. box 2108 mcc, makati, metro manila, tel. +63 2 816 6380, fax. +63 2 817 3474 poland: ul. lukiska 10, pl 04-123 warszawa, tel. +48 22 612 2831, fax. +48 22 612 2327 portugal: see spain romania: see italy russia: philips russia, ul. usatcheva 35a, 119048 moscow, tel. +7 095 755 6918, fax. +7 095 755 6919 singapore: lorong 1, toa payoh, singapore 1231, tel. +65 350 2538, fax. +65 251 6500 slovakia: see austria slovenia: see italy south africa: s.a. philips pty ltd., 195-215 main road martindale, 2092 johannesburg, p.o. box 7430 johannesburg 2000, tel. +27 11 470 5911, fax. +27 11 470 5494 south america: rua do rocio 220, 5th floor, suite 51, 04552-903 s?o paulo, s?o paulo - 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